Personal Information

Date of Birth: May 8, 1981

Birth Place: Jahrom, Iran

Nationality: USA Citizen

Email: bastanip AT ece DOT ucsb DOT edu

Resume: Current Resume - February 2008

Education

University of California, Santa Barbara

· PhD Student at Microprocessor Test and Validation Lab

· Advisor: Li-C. Wang

University of California, Santa Barbara

· M.S. in Computer Engineering

· Major/Minor: Integrated Systems/Computer Architecture

 

Saint Louis University

· B.S. in Electrical Engineering

 

Research and Teaching Experience

Research Assistant at UCSB

· Statistical Timing and Post-Silicon Timing Validation

· Design - Silicon Convergence

Teaching Assistant at UCSB

· Winter 2006: ECE 156B, Synthesis and CAD

· Fall 2005: ECE 156A, HDL and Synthesis

Teaching Assistant at Saint Louis University

· Winter 2003: Digital Design

Work Experience

Intel Corp. - June 2007 to September 2007

· Digital Technology Solutions - Strategic CAD Labs

Freescale Semiconductor - June 2006 to August 2006

· Technology Solutions Organization Group

Qualcomm - June 2005 to September 2005

· QCT Design ASIC Design Intern

Anadigics - May to August 2002-2004 (3 summers)

· Broadband Group Intern

· Electronic Design Automation Group Intern