Pouria Bastani

Publications

Conferences:

1. "Design-Silicon Timing Correlation - A Data Mining Perspective", Li-C. Wang, Pouria Bastani, Magdy Abadir. DAC 2007 San Diego, CA.

2. "Analyzing the risk of timing modeling based on path delay test", Pouria Bastani, Benjamin M. Lee, Li-C. Wang, Savathri Sundareswaran, Magdy Abadir. ITC 2007. Santa Clara, CA.

3. "Analyzing the Risk of Timing Modeling Based on Path Delay Test," Pouria Bastani, Li-C. Wang. TECHCON 2007, Austin, TX. Awarded Best in Test Session.

4. "An Improved Feature Ranking Method for Diagnosis of Systematic Timing Uncertainty," Pouria Bastani, Nicholas Callegari, Li-C. Wang, Magdy Abadir, VLSI-DAT Hsinchu, Taiwan April 23-25, 2008. Nominated for Best Student Paper

5. "Statistical Diagnosis of Unmodeled Systematic Timing Effects," Pouria Bastani, Nicholas Callegari, Li-C. Wang, Magdy Abadir, To appear in DAC June 2008, Anahiem, CA.

6. "Speedpath prediction based on learning from a small set of examples," Pouria Bastani, Kip Killpack, Li-C. Wang, Eli Chiprout, To appear in DAC June 2008, Anahiem, CA. Nominated for DAC Best Paper Award

7. "Diagnosis of design-silicon timing mismatch with feature encoding and importance ranking -- the methodology explained," Pouria Bastani, Nicholas Callegari, Li-C. Wang, Magdy Abadir To appear in ITC Oct. 2008, Santa Clara, CA.

Journals:

1. " Linking Statistical Learning to Diagnosis, " Pouria Bastani, Li-C. Wang, Magdy Abadir, in Proc. IEEE Design and Test of Computers Special Issue Silicon Debug and Diagnosis May/June 2008, pages 232-239.

2. "Case Study on Speed Failure Causes in a Microprocessor," Kip Killpack, Arun Krishnamachary, Suriyaprakash Natarajan, Chandramouli Kashyap, Pouria Bastani, in Proc. IEEE Design and Test of Computers Special Issue Silicon Debug and Diagnosis May/June 2008, pages 224-231.

3. “Statistical Diagnosis Approach for the Ill-posed Problem of Design-Silicon Timing Mismatch,” Pouria Bastani, Nicholas Callegari, Li-C Wang, Magdy Abadir, Submitted to IEEE Transactions on Computer-Aideed Design of
Integrated Circuits and Systems, August 2008.

Workshops:

1. "Data mining to rank cells in terns of timing uncertainties", Pouria Bastani, Benjamin M.Lee, Li-C. Wang, Magdy Abadir Presented at TAU Workshop Feb. 2007, Austin, TX.

2. "Impact of Temperature Inversion on Timing Sign-off and Design Methodology" Sean Wu, Alex Tetelbaum, Pouria Bastani and Li-C. Wang, Presented at Microprocessor Test and Verification Workshop December 2007, Austin, TX.

3. "Statistical Diagnosis of Unmodeled Systematic Timing Effects," Pouria Bastani, Nicholas Callegari, Li-C. Wang, Magdy Abadir, Presented at TAU Workshop Feb. 2008 Monterey, CA.

4. "Speedpath prediction based on learning from a small set of examples," Pouria Bastani, Kip Killpack, Li-C. Wang, Eli Chiprout, Presented at TAU Workshop Feb. 2008 Monterey, CA

5. "Diagnosis of design-silicon timing mismatch with feature encoding and importance ranking," Pouria Bastani, Nicholas Callegari, Li-C. Wang, Presented at the International Test and Synthesis Workshop April 2008, Santa Barbara, CA. Awarded Best Student Paper Presentation

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