Microprocessor Test Verification

7th International Workshop on

Microprocessor Test and Verification
(MTV'06)
Common Challenges and Solutions
December 4-5, 2006, Austin, Texas, USA

Sponsored by:	IEEE Computer Society Test Technology Technical Council

General Chair:	Magdy S. Abadir (M.Abadir@freescale.com), Freescale
Program Chair:	Li-C. Wang (licwang@ece.ucsb.edu), UCSB
Program Co-Chair:	Bhadra Jayanta (Jayanta.Bhadra@freescale.com), Freescale

Final program and presentations

You can download all the presentations of MTV06 by following this link.
Please sent an e-mail to the program co-chair to obtain the password.

The first draft of the program can be downloaded now!
Also, you can download the final program as a brochure format

Hotel

Hyatt Town Lake Hotel
208 Barton Springs Road
Austin, Texas 78704
Reservation Number: 1 (800) 233-1234 or (512) 477-1234

You need to mention "IEEE MTV" while reserving rooms in order to get the conference rate of $129 + tax.
Booking needs to be done by the cut-off date of Nov 13.
Rates are valid for reservations from Dec 3 to Dec 6.

Conference Registration (Deadline Nov 24, 2006)

Click to go for IEEE online registration
Advance registration deadline is Nov 24, 2006
You can also download the registration form (Word or PDF) and fax/e-mail to IEEE directly

Description - Workshop Scope

The purpose of MTV'06 is to bring together researchers and practitioners from all areas of work related to verification and test in order to exchange innovative ideas and present new methodologies for solving the challenges facing us today in various processor and SOC design environments. The workshop will take place in Austin, Texas, the live music capital of the world.

Areas of Interest

Validation of microprocessors and SOCs
Experiences on test and verification of high performance processors and SOCs
Test/verification of multimedia processors and SOCs
Performance testing
High-level test generation for functional verification
Emulation techniques
Silicon debugging
Formal techniques and their applications
Verification coverage
Test generation at the transistor level
Equivalence checking of custom circuits at the transistor level
Circuit level verification
Switch-level circuit modeling
Timing verification techniques
Path analysis for verification or test
Design error models
Design error diagnosis
Design for testability or verifiability
Optimizing SAT procedures for application to testing and formal verification

Organizing Committee

Finance:	Jennifer Dworak (Brown Univ)
Publication:	Alper Sen (Freescale)
Panel:	Al Crouch (Inovys)
Publicity:	Tao Feng (Cadence)
Committee:	Moshe Levinger (IBM - Israel)
European/Canadian	Andreas Veneris (U. of Toronto)

Program Committee

Jacob Abraham (UT-Austin); Miron Abramovici (DAFCA)
Hussain Al-Asaad (UC-Davis): Tony Ambler (UT-Austin); Eyal Bin (IBM - Haifa); Shawn Blanton (CMU); Melvin Breuer (USC); Ken Butler (TI); K.-T. (Tim) Cheng (UCSB); Nick Dutt (UCI); Sujit Dey (UCSD)
Ajit Dingankar (Intel): Franco Fummi (Universita `di Verona); Mike Garcia (Freescale); Sandeep Gupta (USC); Ian Harris (U. Mass.); John Hayes (U. Michigan); Eric Hennenhofer (Obsidian, Inc.); Alan J.Hu (UBC, Canada); T.M.Mak (Intel); Anmol Mathur (Calypto); Hillel Miller (Freescale); Sankaran Menon (Intel); Ishwar Parukar (Sun Microsystems); Carl Pixley (Synopsys, Inc.); Paolo Prinetto (Poli di Torino); Nur Touba (UT-Austin); Miroslav Velev; Vivekananda Vedula (Intel); Cheng-Wen Wu (National Tsing-Hua University); Paul R Zehr (Intel); Yervant Zorian (MirageLogic)

Past MTV workshop Information

The Call for Participant page of MTV 2005
The original MTV 2004 Call for Papers.
MTV 2004 was held in Austin in September, 2004.
MTV 2004 Web site can be found HERE.